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ds04-29116-2e fujitsu semiconductor data sheet spread spectrum clock generator mb88151 description mb88151 is a clock generator for emi (electro magnetic interference) reduction. th e peak of unnecessary radi- ation noise (emi) can be attenuated by making the oscilla tion frequency slightly modulate periodically with the internal modulator. it corresponds to both of the center spread which modul ates frequency in modulation off as middle centered and down spread which modulates so as not to exceed fre quency in modulation off. features ? input frequency : 16.6 mhz to 33.4 mhz multiplication rate : 1/2, 1, 2, 4 output frequency : 8.3 mhz to 16.7 mh z, 16.6 mhz to 33.4 mhz, 33.3 mhz to 66.7 mhz, 66.6 mhz to 133.4 mhz modulation rate : 0.5 % , 1.5 % (center spread), ? 1.0 % , ? 3.0 % (down spread) equipped with oscillation circuit : r ange of oscillation 16.6 mhz to 33.4 mhz modulation clock output duty : 40 % to 60 % (continued) pac k ag e 8-pin plastic sop (fpt-8p-m02)
mb88151 2 (continued) modulation clock cycle-cycle jitter mb88151-100, 200 : less than 100 ps MB88151-400 : less than 150 ps mb88151-500 : less than 200 ps low current consumption by cmos proc ess : 5 ma (24 mhz : typ-sample, no load) power supply voltage : 3.3 v 0.3 v operating temperature : ? 40 c to + 85 c package : sop 8-pin product lineup mb88151 has four kinds of multiplication type. pin assignment pin description product input frequency range multiplier ratio output frequency range mb88151-100 16.6 mhz to 33.4 mhz multiplied by 1 16.6 mhz to 33.4 mhz mb88151-200 multiplied by 2 33.3 mhz to 66.7 mhz MB88151-400 multiplied by 4 66.6 mhz to 133.4 mhz mb88151-500 multiplied by 1/ 2 8.3 mhz to 16.7 mhz pin name i/o pin no. description xin i 1 resonator connection pin/clock input pin v ss ? 2 gnd pin sel0 i 3 modulation rate setting pin sel1 i 4 modulation rate setting pin ckout o 5 modulated clock output pin ens i 6 modulation enable setting pin (with pull-up resistance) v dd ? 7 power supply voltage pin xout o 8 resonator connection pin 1 2 3 4 8 7 6 5 xin v ss s el0 s el1 xout v dd ens ckou t mb88151 top view fpt-8p-m02
mb88151 3 i/o circuit type note : for xin and xout pins, see ? oscillation circuit?. pin circuit type remarks sel0 sel1 cmos hysteresis input ens cmos hysteresis input with pull-up resistor 50 k ? (typ) ckout cmos output i ol = 4 ma 50 k ?
mb88151 4 handling devices preventing latchup a latchup can occur if, on this device, (a) a voltage higher than v dd or a voltage lower than v ss is applied to an input or output pin or (b) a voltage hi gher than the rating is applied between v dd and v ss . the latchup, if it occurs, significantly increases the power supply current and ma y cause thermal destruction of an element. when you use this device, be very careful not to exceed the maximum rating. handling unused pins do not leave an unused input pin open, since it ma y cause a malfunction. handle by, using a pull-up or pull-down resistor. unused output pin should be opened. the attention when the external clock is used input the clock to xin pin, and xout pin s hould be opened when you us e the external clock. please pay attention so that an ov ershoot and an undershoo t do not occur to an input clock of xin pin. power supply pins please design connecting the power s upply pin of this device by as low impedance as possible from the current supply source. we recommend connecting electr olytic capacitor (about 10 f) and the ceramic capacitor (about 0.01 f) in parallel between v ss and v dd near the device, as a bypass capacitor. oscillation circuit noise near the xin and xout pins may cause the device to malfunction. design printed circuit boards so that electric wiring of xin or xout pin and th e resonator do not intersect other wiring. design the printed circuit board that surro unds the xin and xout pins with ground.
mb88151 5 block diagram v dd ckou t v ss r f = 1 m ? sel1 xout xin sel0 ens 1 ? m 1 ? n 1 ? l idac ico clock output modulation rate setting modulation rate setting modulation enable setting reference clock pll block reference clock phase compare v/i conversion modulation logic modulation rate setting/ modulation enable setting loop filter modulation clock output mb88151 pll block charge pump a glitchless idac (current output d/a converter) provides precise modulation, thereby dramatically reducing emi.
mb88151 6 pin setting when changing the pin setting, the stabilization wait time for the modulation clock is required. the stabilization wait time for the modulation clock take the maximum value of ? electrical characteristics ? ac characteristics lock-up time?. ens modulation enable setting note : spectrum does not spread when ?l? is set to ens. the clock with low jitter can be obtained. because of ens has pull-up resistance, spectrum spread when ?h? is set to it or open the terminal. sel0, sel1 modulation rate setting note : the modulation rate can be c hanged at the level of the terminal. ? center spread spectrum is spread (modulated) by cent ering on the frequency in modulation off. ens modulation l no modulation h modulation sel1 sel0 modulation rate modulation type ll 1.5 % center spread lh 0.5 % center spread hl ? 1.0 % down spread hh ? 3.0 % down spread ? 1.5% + 1.5% radiation level frequency frequency in modulation off center spread example of 1.5 % modulation rate modulation width 3.0 %
mb88151 7 ? down spread spectrum is spread (modulated) belo w the frequency in modulation off. ? 3.0% frequency in modulation off frequency radiation level down spread example of ? 3.0 % modulation rate modulation width 3.0 %
mb88151 8 absolute maximum ratings * : the parameter is based on v ss = 0.0 v. warning: semiconductor devices can be permanently dam aged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. parameter symbol rating unit min max power supply voltage* v dd ? 0.5 + 4.0 v input voltage* v i v ss ? 0.5 v dd + 0.5 v output voltage* v o v ss ? 0.5 v dd + 0.5 v storage temperature t st ? 55 + 125 c operation junction temperature t j ? 40 + 125 c output current i o ? 14 + 14 ma overshoot v iover ? v dd + 1.0 (t over 50 ns) v undershoot v iunder v ss ? 1.0 (t under 50 ns) ? v v d d v s s i nput pin overshoot/undershoot t under 50 ns t over 50 ns v iover v dd + 1.0 v v iunder v ss ? 1.0 v
mb88151 9 recommended operating conditions (v ss = 0.0 v) warning: the recommended operating conditions are require d in order to ensure the normal operation of the semiconductor device. all of the device?s electric al characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating cond ition ranges. operation outside these ranges may adversely affect re liability and could result in device failure. no warranty is made with respect to uses, operat ing conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. parameter symbol pin conditions value unit min typ max power supply voltage v dd v dd ? 3.0 3.3 3.6 v ?h? level input voltage v ih xin, sel0, sel1, ens ? v dd 0.80 ? v dd + 0.3 v ?l? level input voltage v il ? v ss ? v dd 0.20 v input clock duty cycle t dci xin 16.6 mhz to 33.4 mhz 40 50 60 % operating temperature ta ?? ? 40 ? + 85 c ckin t a t b 1.5 v input clock duty cycle (t dci = t b /t a )
mb88151 10 electrical characteristics dc characteristics (ta = ? 40 c to + 85 c, v dd = 3.3 v 0.3 v, v ss = 0.0 v) parameter symbol pin conditions value unit min typ max power supply current i cc v dd no load capacitance at output 24 mhz mb88151-100 ? 5.0 7.0 ma output voltage v oh ckout ?h? level output, i oh = ? 4 ma v dd ? 0.5 ? v dd v v ol ?l? level output, i ol = 4 ma v ss ? 0.4 v output impedance z o ckout 8.3 mhz to 133.4 mhz ? 45 ?? input capacitance c in xin, sel0, sel1, ens ta = + 25 c, v dd = v i = 0.0 v, f = 1 mhz ?? 16 pf load capacitance c l ckout 8.3 mhz to 66.7 mhz ?? 15 pf 66.7 mhz to 100 mhz ?? 10 100 mhz to 133.4 mhz ?? 7 input pull-up resistance r pu ens v il = 0.0 v 25 50 200 k ?
mb88151 11 ac characteristics (ta = ? 40 c to + 85 c, v dd = 3.3 v 0.3 v, v ss = 0.0 v) note : the modulation clock stabilization wait time is required after the power is turned on, the ic recovers from power saving, or after freq (frequency range) or en s (modulation on/off) setting is changed. for the modulation clock stabilization wait time, as sign the maximum value for lock-up time. parameter symbol pin conditions value unit min typ max oscillation frequency f x xin, xout fundamental oscillation 16.6 ? 33.4 mhz input frequency f in xin external clock input 16.6 ? 33.4 mhz output frequency f out ckout mb88151-100 (multiply by 1) 16.6 ? 33.4 mhz mb88151-200 (multiply by 2) 33.3 ? 66.7 MB88151-400 (multiply by 4) 66.6 ? 133.4 mb88151-500 (2-frequency division) 8.3 ? 16.7 output slew rate sr ckout 0.4 v to 2.4 v load capacitance 15 pf 0.4 ? 4.0 v/ns output clock duty cycle t dcc ckout 1.5 v 40 ? 60 % modulation frequency f mod ckout ?? 12.5 ? khz lock-up time t lk ckout ?? 25ms cycle-cycle jitter t jc ckout mb88151-100, 200 no load capacitance, ta = + 25 c, v dd = 3.3 v, standard deviation ?? 100 ps MB88151-400 no load capacitance, ta = + 25 c, v dd = 3.3 v, standard deviation ?? 150 mb88151-500 no load capacitance, ta = + 25 c, v dd = 3.3 v, standard deviation ?? 200
mb88151 12 output clock duty cycle (t dcc = t b /t a ) input frequency (f in = 1/t in ) output slew rate (sr) cycle-cycle jitter (t jc = | t n ? t n + 1 |) ckout 1.5 v t a t b 0.8 v dd t in ckin 2.4 v 0.4 v t f t r c kout note : sr = (2.4 ? 0.4) /t r , sr = (2.4 ? 0.4) /t f t n+1 t n ckout note : cycle-cycle jitter is defined the differen ce between a certain cycle and immediately after (or, immediately before) .
mb88151 13 modulation waveform f mod = 12.5 khz (typ) ? 1.5 % + 1.5 % f mod = 12.5 khz (typ) ? 1.0 % ? 0.5 % ? 1.5 % modulation rate, example of center spread ? ? 1.0 % modulation rate, example of down spread ckout output frequency ckout output frequency frequency at modulation off frequency at modulation off time time
mb88151 14 lock-up time if the setting pin is fixed at the ?h? or ?l? level, the maximum time after the power is turned on until the set clock signal is output from ckout pin is (the stabiliz ation wait time of input clock to xin pin) + (the lock-up time ?t lk ?). for the input clock stabilization time, check the c haracteristics of the resonator or oscillator used. for modulation enable control using t he ens pin during normal operation, t he set clock signal is output from ckout pin at most the lock-up time (t lk ) after the level at the ens pin is determined. note : when the pin setting is changed, the ckout pin output clock stabilization time is required. until the output clock signal becomes stable, the output frequency, out put clock duty cycle, modulation period, and cycle- cycle jitter cannot be guaranteed. it is therefore advi sable to perform processing such as cancelling a reset of the device at the succeeding stage after the lock-up time. 3.0 v v dd xin v ih ckout setting pin sel0, sel1, ens internal clock stabilization wait tim t lk (lock-up time ) v il v ih xin ens ckout t lk (lock-up time ) t lk (lock-up time )
mb88151 15 oscillation circuit the figure below shows the connection example about gener al resonator. the oscillation circuit has the built-in resistance (1 m ? ) . the value of capacity (c 1 and c 2 ) is required adjusting to the most suitable value of individual resonator. the most suitable value is different by individual reso nator. please refer to the resonator manufacturer which you use for the most suitable value. input the clock to xin pin, and do not connect anything with xout pin if you use the external clock (you do not use the resonator). c 1 r f (1 m ? ) c 2 xin pin lsi internal lsi external xout pin ? when using the resonator ? when using an external clock open r f (1 m ? ) note : note that a jitter characteristic of an i nput clock may cause an affe ct a cycle-cycle jitter characteristic. lsi internal lsi external xout pin xin pin external clock
mb88151 16 interconnection circuit example 1 2 3 4 8 7 6 5 mb88151 c 1 c 2 c 4 c 3 r 1 + sel0 sel1 xtal ens c 1 , c 2 : oscillation stabilization capacitance (see ? oscillation circuit?.) c 3 : capacitor of 10 f or higher c 4 : capacitor about 0.01 f (connect a capacitor of good high frequency property (ex. laminated ceramic c apacitor) to close to this device) r 1 : impedance matching resistor for board pattern
mb88151 17 spectrum example characteristics the condition of the examples of the characte ristic is shown as follows : input frequency = 20 mhz (output frequency = 20 mhz : using mb88151-100 (multiply by 1)), power - supply voltage = 3.3 v, none load capacity, modulation rate = 1.5% (center spread). spectrum analyzer hp4396b is connected with ckou t. the result of the measurement with rbw = 1 khz (att use for ? 6db). ch b spectrum 10 db /ref 0 dbm a vg 4 rbw# 1 kh z vbw 1 kh z att 6 db center 20 mh z swp 2.505 s span 4 mh z no modulation ? 6.54 dbm 1.5% modulation ? 24.45 dbm
mb88151 18 ordering information part number input frequency range multiplier ratio output frequency range package remarks mb88151pnf-g-100-jne1 mb88151pnf-g-200-jne1 mb88151pnf-g-400-jne1 mb88151pnf-g-500-jne1 16.6 mhz to 33.4 mhz multiplied by 1 multiplied by 2 multiplied by 4 multiplied by 1/2 16.6 mhz to 33.4 mhz 33.3 mhz to 66.7 mhz 66.6 mhz to 133.4 mhz 8.3 mhz to 16.7 mhz 8-pin plastic sop (fpt-8p-m02) mb88151pnf-g-100-jn-efe1 mb88151pnf-g-200-jn-efe1 mb88151pnf-g-400-jn-efe1 mb88151pnf-g-500-jn-efe1 multiplied by 1 multiplied by 2 multiplied by 4 multiplied by 1/2 16.6 mhz to 33.4 mhz 33.3 mhz to 66.7 mhz 66.6 mhz to 133.4 mhz 8.3 mhz to 16.7 mhz 8-pin plastic sop (fpt-8p-m02) emboss taping (ef type) mb88151pnf-g-100-jn-ere1 mb88151pnf-g-200-jn-ere1 mb88151pnf-g-400-jn-ere1 mb88151pnf-g-500-jn-ere1 multiplied by 1 multiplied by 2 multiplied by 4 multiplied by 1/2 16.6 mhz to 33.4 mhz 33.3 mhz to 66.7 mhz 66.6 mhz to 133.4 mhz 8.3 mhz to 16.7 mhz 8-pin plastic sop (fpt-8p-m02) emboss taping (er type)
mb88151 19 package dimension 8-pin plastic sop (fpt-8p-m02) note 1) *1 : these dimensions include resin protrusion. note 2) *2 : these dimensions do not include resin protrusion. note 3) pins width and pins th ickness include plating thickness. note 4) pins width do not include tie bar cutting remainder. dimensions in mm (inches) note: the values in parentheses are reference values. c 2002 fujitsu limited f08004s-c-4-7 1.27(.050) 3.900.30 6.000.40 .199 ?.008 +.010 ?0.20 +0.25 5.05 0.13(.005) m (.154.012) (.236.016) 0.10(.004) 14 5 8 0.440.08 (.017.003) ?0.07 +0.03 0.22 .009 +.001 ?.003 45 ? 0.40(.016) "a" 0~8 ? 0.25(.010) (mounting height) details of "a" part 1.550.20 (.061.008) 0.500.20 (.020.008) 0.600.15 (.024.006) 0.150.10 (.006.004) (stand off) 0.10(.004) * 1 * 2
mb88151 fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any ot her right of fujitsu or any third party or does fujitsu warrant non-in fringement of any third-party?s intellectual property right or othe r right by using such information. fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremel y high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, ai rcraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon syst em), or (2) for use requiring extremely high reliability (i.e., su bmersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design m easures into your facility and equipment such as redundancy, fi re protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. f0502 ? 2005 fujitsu limited printed in japan

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